RTL Design Engineer

RTL Design engineer with experience using languages/tools such as OVM/UVM, Perl, Shell Scripting, Altera/Xilinx is now required to join my client in Shannon

Responsibilities:
Developing the micro-architectural specification of complex design block(s)
Logic implementation of complex design block(s) using RTL coding techniques
Working with pre-Silicon validation engineers to develop unit and cluster level directed/random tests and environments
Targeting (synthesis, place and route and timing closure) RTL design blocks to FPGA architectures
Using lab equipment to debug hardware functionality in the lab
Interacting closely with other teams such as the Architecture, Software and Post-Silicon Validation

Experience:

Extensive experience of FPGA, ASIC and/or SoC design experience
RTL level Digital IC design using System Verilog and/or Verilog
Proven track record of successful first time delivery of projects
A self starter with the ability to assume leadership roles
Ability to work well in a diverse team environment
Experience with industry standard development tools and methodologies

Skills:
Experience with languages/tools such as System Verilog for Verification, OVM/UVM, Perl, Shell Scripting, Altera/Xilinx FPGA Tool Suites
Experience in some of the following technologies/protocols: CPRI, Ethernet, PCIe, LTE/3G
Experience with a Semiconductor manufacturing company would be beneficial

To apply for this position, candidates must be eligible to live and work in the EU

Connectus Technology Limited is acting as an Employment Agency in relation to this vacancy.