Hardware Validation Engineer

The SOC INTEGRATION AND VERIFICATION ENGINEER will work closely with other engineers to implement validation infrastructure and build/execute a test plan for a SoC design described at multiple abstraction layers: C++/SystemC/RTL.

DAILY RESPONSIBILITIES: Candidate will work independently most of the time. Guidance will be provided by senior technical members of the group. Daily responsibilities include implementing a validation framework, and testing hardware/software features.

WE\'RE LOOKING FOR APPLICANTS WITH 5+ YEARS OF RELATED WORK EXPERIENCE.

REQUIRED SKILLS:

- Software Testing, advanced skills and experience
- C/C++ testing framework expertise
- Validation, advanced skills
- Verilog/VHDL, advanced skills
- Unit/system testing experience for C++/SystemC design
- Advanced verification methodology (UVM, OVM) for RTL a plus
- FPGA emulation (bringing up and running tests against a FPGA emulation board) nice to have

Estimated length of assignment: 52 weeks
Number of positions available: 1
Estimated hours per week: 40
% of travel required: 0
Telecommuting: No

Please include a daytime phone number where you can best be reached along with your Resume. Please also include a brief cover letter outlining your experience as related to this job requirement. CompuCom is an Equal Opportunity Employer. No 3rd party/recruiters please.