FPGA Design and Verification Contract, Systemverilog - UK

An FPGA Design and Verification engineer is required for a contract based in the South of the UK with the following skill set:

- Design for Video Codec Functions on FPGA's
- Experience in Test Planning, Constrained Random Testing and co- simulation using Systemverilog.
- Experience in Verilog and SystemC

An FPGA Design and Verification engineer is urgently needed for a 12 month contract based in the South of the UK. The role will involve: Hardware design to develop video codec functions on FPGA; Developing innovative video processing solutions to enable rapid development of complex FPGA based SoC Chip video designs. This will include development of modular video processing functions and using system level tools for abstracted design for capture and debug; Ensuring common methodologies for verification of 3rd party hardware functions and rapid integration are put into framework; Verification to extensively test video codec functions - test plans, constrained random testing and co simulation using systemverilog is a must; experience with either OVM or UVM would be an added benefit but not essential.

If you feel you have the necessary skill set to successfully complete the above contract then please do not hesitate to contact Tom Huggins at IC Resources.

Notes: 12 months, FPGA Design, Verification, SystemC, Verilog, Systemverilog, UK, C, C++, Constrained Random Testing, Test planning, co-simulation.

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