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Digital (Mixed Signal) Verification Engineer (m/f)
Eingestellt von SOLCOM GmbH aus Reutlingen
Gesuchte Skills: Engineer, Python, Perl, Unix
Projektbeschreibung
Your daily tasks include:
+ The device contains a microcontroller
+ The tests are based on C and SystemVerilog/UVM
+ The analog blocks are modeled via real value models in Verilog
+ Have at least 4 years experience in pre-silicon digital verification (optional AMS-verification)
+ Ability to debug complex mixed signal systems
+ Have an in-depth knowledge and project experience of SystemVerilog, Verilog, OVM, UVM and/or SVA
+ Ability to write small test programs in C
+ Have a good knowledge of Unix programming languages such as shell, Perl and Python
+ Any knowledge of mixed-signal verification would be beneficial (at real value modeling level)
+ English written and spoken
Are you interested? Please send us your CV including the date of your availability and your hourly rate.
Projektdetails
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Einsatzort:
Münichreith-Laimbach, Österreich
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Projektbeginn:
asap
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Projektdauer:
4 months +
- Vertragsart:
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Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
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Kategorie:
IT Entwicklung, Ingenieurwesen/Technik
SOLCOM GmbH
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Straße:
Schuckertstr. 1
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Ort:
72766 Reutlingen, Deutschland
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Projekte:
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