Component Design Engineer

OUR HIGH-VISIBILITY CLIENT IS SEEKING AN ASIC DESIGN ENGINEER TO CONTRIBUTE TO A MEMORY EXPANSION CHIP DESIGN FOR USE IN HIGH END SERVER PLATFORMS.

OVERVIEW

- Provide RTL coding to implement chipset functionality per Cspec, HAS, MAS.
- Work closely with pre-si validation team to debug failing tests.
- Work closely with Physical Design team to resolve timing closure issues.
- Document functionality, usage models as required to support stakeholders.

REQUIREMENTS

- Solid knowledge of ASIC design flows and methodologies
- Solid knowledge of ASIC verification methodology
- Experience writing micro-architecture spec
- Experience converting micro-architecture spec to RTL design
- Solid knowledge of RTL coding for synthesis using Verilog
- Solid knowledge of RTL coding for DFX
- Experience with Synopsys Design Compiler
- Experience with Timing analysis and timing closure
- Experience with gate level simulations and debug
- Excellent written and verbal communication skills

TOOLS

- VCS, Design Compiler (synthesis)
- Verilog/System Verilog, Unix C-Shell, Source Code Management

ADDITIONAL SKILLS (NICE TO HAVE)

- Architecture: IA, ARM, Embedded controllers
- Protocols: DDR, PCIE, AMBA
- Tools: Lint, FPV, Perl, Tcl

Estimated length of assignment: 7 months - 18 months
Number of positions available: 1 for now
Estimated hours per week: 40
% of travel required: 0-5%
Telecommuting: Per sponsor's approval only, on site majority of time.

Please include a daytime phone number where you can best be reached along with your Resume. Please also include a brief cover letter outlining your experience as related to this job requirement.

CompuCom is an Equal Opportunity Employer. No 3rd party/recruiters please.