ASIC Verification Contract, UVM, Systemverilog, OVM - UK

ASIC Verification Contract, UVM, SystemVerilog, OVM - UK

An ASIC Verification engineer is urgently needed for a contract based in the South of the UK requiring the following skill set:

- Experience in UVM Methodology
- Experience in using SystemVerilog
- Knowledge in RTL Design would be beneficial
- ASIC Verification experience is the focus

An urgent ASIC Verification contractor is needed for a 7 month project based in the South of the UK. It requires a start as soon as possible and would be for on site work. It is necessary to have good experience in using UVM Methodology to create the verification environments and good exposure to using SystemVerilog for the verification language.

Any additional knowledge in RTL Design would be very beneficial. They are really looking for an engineer who can hit the ground running and is conversant with both UVM and SystemVerilog.

If you feel you have the required experience to successfully complete the above project then please do not hesitate to contact Tom Huggins at IC Resources.

Notes: 7 months, ASIC Verification, UVM, systemverilog, OVM, Specman, Digital Design, RTL, FPGA, Verilog, South of the UK

IC Resources - your first contact for ASIC/FPGA design and verification jobs.