Verification Engineer (Verilog, FPGA, ASIC) Cambridge, £40ph

Verification Engineer (Verilog, FPGA, ASIC)Cambridge, £40ph

A leading Technology Organisation based inCambridgeare looking to bring in a Verification Engineer on an initial 3-6month contract at a rate of £40ph. You will be joining the growing Hardware Design team and helping to work on a key project of the clients helping to deliver a high quality project.

The role is focussed to one of the clients key projects, the verification stage is now crucial to delivering a high quality product using ASIC verification techniques throughout. The team is targeting applications at FPGAs, the verification skills of the successful candidate are likely to have been gained in an ASIC development environment.

Key Responsibilities:

- UVM and System Verilog
- Verify applications and Library components developed by the RTL team to deliver high quality FPGA firmware to high profile clients

Requirements:

- Full experience of the verification process from test plan creation to verification sign off on complex projects
- Extensive experience in System Verilog, OVM, UVM, DPI and TLMs
- Experience of appropriate techniques - * co-simulation,

* coverage collection,
* constrained random stimulus

- Programming experience in C, Python and Sockets-based networking
- Linux, Bash or GNU Make experience

Desirable

- Packet/wired-networking background;
- knowledge of Ethernet Layer 2 and Layer 3 protocols
- Provide input to the board design process

This is an immediate requirement with interviews taking place this week, if you are interested then please send me your latest CV and give me a call on 020 7758 7318.

To find out more about Real Staffing please visit www.realstaffing.com