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Verification Engineer, Systemverilog, UVM - South UK
Eingestellt von IC Group Ltd
Gesuchte Skills: Engineer, Design
Projektbeschreibung
- ASIC Verification
- Knowledge of UVM/ OVM
- Experience with SystemVerilog or Specman
IC Resources has an important and urgent contract for an ASIC Verification Engineer based in the Thames Valley area. It requires experience in either OVM or UVM and either SystemVerilog or Specman. It will be for a 3-6 month contract and would be for on site work requiring someone to start as soon as possible.
If you have the required skill set to successfully complete the above project and are eligible to work in the UK, please do not hesitate to contact Tom Huggins at IC Resources.
Key words:6 month Contract, Verification, OVM, UVM, SystemVerilog, Hertfordshire, Constrained Random Verification Methodologies, Specman, Regression Tests, Code Coverage, SystemC, VHDL, Verilog RTL
IC Resources - your first contact for ASIC/FPGA design and verification jobs.
Projektdetails
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Einsatzort:
England, Vereinigtes Königreich
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Projektbeginn:
asap
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Projektdauer:
Keine Angabe
- Vertragsart:
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Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
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Kategorie:
Medien/Design, Ingenieurwesen/Technik