Dieses Jobangebot ist archiviert und steht nicht mehr zur Verfügung.
Vakante Jobangebote finden Sie unter Projekte.

Verification Engineer

Eingestellt von Quanta Consultancy Services

Gesuchte Skills: Engineer, Design, Cad

Projektbeschreibung

Verification Engineer - 6 months

As part of the integrated electronic group, you will participate in the study and development of on-board the European satellite equipment and will be responsible in particular for the verification and validation of digital ASICs and FPGAs.

Required profile:
experience in digital design (FPGA/ASIC)
Excellent knowledge of languages VHDL & SystemVerilog.
Excellent knowledge of methods of verification of complex digital design.
QuestaSim control and audit methodology LMOs/UVM.
Control flow developing FPGA/ASIC
Knowledge of CAD tools (Mentor)
French Speaking

Projektdetails

  • Einsatzort:

    Bern, Schweiz

  • Projektbeginn:

    asap

  • Projektdauer:

    6 months

  • Vertragsart:

    Contract

  • Berufserfahrung:

    Keine Angabe

Geforderte Qualifikationen

Quanta Consultancy Services