Verification Engineer

Verification Engineer

Based in Cambridge

Duration: 6 months +

Rate: £35 - £45p/h

Key Skills: System Verilog, Specman, UVM, OVM, ASIC Verification, FPGA Verification

Contact: Edward Hammersley

A leading multinational organisation is looking to recruit an additional Verification Engineer as a result of ever increasing workload. This organisation has a significant presence in the U.K. with the vast majority of R+D conducted in Cambridge.

Within this role you'll be using System Verilog for ASIC Verification for a variety of next generation products. Previous experience with OVM or UVM will required as will previous SVA.

Essential Skills:
System Verilog
ASIC Verification
OVM or UVM

Desirable Skills:
Specman
FPGA Design
ASIC Design

This is a fantastic opportunity to work with a well-known organisation that has a history of utilising long term contractors.

To apply for this role send a copy of your CV to Edward Hammersley or call.

JAM is acting as an Employment Business with regards to this position.

JAM Recruitment is acting as an employment business with regards to this position.