Validation Engineer - Emulation

Yoh has a contract position for a VALIDATION ENGINEER - EMULATION to join our client in Chandler, AZ.

JOB RESPONSIBILITIES:

- Validation Engineer will work closely with pre-silicon/post-silicon design teams working on System-on-a-Chip (SoC) development projects based on processor architectures.
- Validation Engineer will be responsible for emulation activities such as synthesis, emulation model building, co-emulation, co-simulation development and target H/W development.
- Lead efforts in logic design using VHDL/Verilog/SystemVerilog/SystemC, pre-silicon validation/debug at unit, full-chip and system levels, fullchip integration, and Silicon debug.
- Work with architecture, platform, product and validation engineering teams across the globe and implementing pre-silicon emulation/FPGA models, performing the functional and gate level verification of the ASICs.

JOB QUALIFICATIONS:

- Minimum of BS/MSEE with five (5) plus years of design and validation experience is required along with five (5) plus years experience in library support.
- Must have Multi-FPGA experience with Xilinx Virtex V and/or VI series.
- Experience with FPGA partitioning tools such as Certify and/or Auspy.
- Experience in working with multimillion gate chip designs from specification.
- Five (5) plus years of design verification experience.
- Three (3) plus years of experience with logic/RTL design - VHDL, Verilog, System Verilog.
- Two (2) plus years of working experience with logic synthesis and timing analysis tools - Synopsys, Synplify Pro.
- Two (2) plus years of working experience with FPGA development with proprietary FPGA cards or commercial cards such as Hardi, EVE, Dini, Prodesign.
- Strong working knowledge of UNIX environment.
- Excellent waveform debug skills with simulation testbenches using Front End industry standard design tools like ModelSim, VCS, NCSIM, Debussy.
- Lab Experience with debug equipment (Oscilloscope, Multimeter, Logic Analyzers and Signal generators) to tape-out.
- Experience with fullchip validation and debug.
- Strong background in logic/RTL design, functional validation, system level knowledge, UNIX, C/C++, PERL, TCL, Front End industry standard design tools required.

PREFERRED JOB SKILLS/EXPERIENCE/KNOWLEDGE:

- Experience with emulators such as IKOS, Axis, Merc+, Cobalt, Palladium, EVE-ZebuFPGAs is a plus.
- Experience using UNIX Revision Control tools - Subversion, RCS, CVS, ClearCase two (2) plus years of working experience with commercial emulators - Quickturn, Palladium, Cobalt, IKOS, Mentor Graphics, Axis.
- Familiarity with System (SOC) level debug.
- Familiarity with General Logic Design concepts.
- Familiarity with EDA Modeling languages such as SystemC.
- Familiarity with PSL and/or SVA assertions.
- PCB experience of printed circuit boards with BGAs, surface mount components and high density interconnects.
- Experience with high speed signal modelling, routing, gnal integrity design and manufacturing.
- Demonstrate the ability to work with cross-site teams across the globe.

Discover all that's possible with Yoh. Apply now.

RECRUITER: Aleks B

Yoh is a professional staffing provider with over 70 years of experience in the short- and long-term staffing services industry; visit our website to learn both about our company and about our leading staffing solutions.

Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer, M/F/D/V.

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