Validation Engineer

VERIFICATION ENGINEER NEEDED FOR A PREMIUM CONTRACT OPPORTUNITY WITH A WORLD LEADING COMPUTER COMPONENTS COMPANY.

The project is pre-silicon validation of a test chip using FPGA simulation environment to make sure that the test chip will work at FPGA system level.

RESPONSIBILITIES INCLUDE:

- Creating verification environment for the FPGA simulation
- Reuse of IP level tests
- Validation and debugging
- Validation using system Verilog/OVM
- Usage of Simulation tools like VCS.

REQUIREMENTS:

- 10 years in Semiconductor industry with 5 years of verification of digital design
- Proficiency in System Verilog
- OVM PCIe protocol knowledge
- Shell/C script knowledge
- MIPI protocol knowledge preferred
- FPGA simulation preferred

ESTIMATED LENGTH OF ASSIGNMENT: 20
NUMBER OF POSITIONS AVAILABLE: 1
ESTIMATED HOURS PER WEEK: 40
% OF TRAVEL REQUIRED: 0
TELECOMMUTING: No

Please include a daytime phone number where you can best be reached along with your Resume. Please also include a brief cover letter outlining your experience as related to this job requirement. CompuCom is an Equal Opportunity Employer. No 3rd party/recruiters please.