Sub-System V

Sub-system V&V and Certification Engineer required to support software functional Verification and Validation (V&V) activities.

Typical activities will include:
The design of test scenarios for software proving and assessment of results for compliance and completeness of proving evidence.
Preparation of evidence to support verification/validation and qualification of the sub-systems leading to the preparation of design certificates.
Investigations into a full range of problems, issues or developments as a member of a project team.
Preparation of requirement verification matrices, PTCCs and CofDs.
Support to preparation of sub-system safety cases.
Support to sub-system studies and design definition.
Deliver V&V and Certification activities across assigned work packages including all export variants.
Contribute to the completion of the V&V artefacts such as the Design Verification Plan (DVP) and Requirements Verification Matrix (RVM). Maintain these V&V artefacts as these will evolve and be updated along with the designs.
Capture and deliver the proving evidence against the design and requirements, to enable the appropriate evidence flow.

The successful candidate will have the below skills:
Desirable knowledge of Rhapsody and SySML.
Desirable knowledge of DOORS for requirement management, tracking and mapping certification evidence.
Sound understanding of the system V&V process (including system and sub -system specification, test, integration and certification).
Ability to co-ordinate and distribute work amongst team members.
Ability to create effective working relationships with internal stakeholders (eg systems and software teams).
Ability to work on own initiative.
Ability to work to deadlines under programme and cost pressures.
Experience in software and/or hardware design and development programmes.
Candidates must be willing to undergo a security vetting procedure.