SoC/ASIC,RTL Design&verific.,Verilog,Interconnect (Bus Fabric)

An ASIC Design Contractor is urgently needed for a position based in the South East of the UK requiring the following skill set:

- RTL Design experience
- Interconnect (bus fabric) specification
- Configuration and RTL generation
- Knowledge of the complete SoC design and development cycle
- Any exposure to SoC Architecture, design, verification, validation and test teams in previous roles would be advantageous
- Experience with design and verification in Verilog
- Synthesis / Timing Analysis experience
- Digital hardware experience
- Desirable skills - Functional verification, system performance analysis, layout flow and constraints, lab equipment experience

An urgent ASIC Design Engineer is needed for an important client of IC Resources on a contractual basis based in the Thames Valley area of the UK. It requires experience in RTL design and verification in Verilog, and an appreciation for the complete digital flow. It will be for a 3-6 month contract and would be for on site work requiring someone to start as soon as possible using Cadence Simluator, Synopsys Design Complier and Spyglass.

If you have the required skill set to successfully complete the above project and are eligible to work in the UK, please do not hesitate to contact Robert Maw at IC Resources.

Key words: SoC, ASIC, Design, RTL, Verification, Verilog, VHDL, Validation, STA, Cadence, Synopsys, Digital, Functional Verification, Interconnect, Bus Fabric, Specification, RTL Generation, Configuration, 3 Months, UK, Spyglass, Cadence, Synopsys, Design Compiler.

IC Resources - your first contact for ASIC/FPGA design and verification jobs.