Senior SoC RTL Design Engineer

RTL DESIGN ENGINEERS NEEDED TO WORK ON THE SOC DESIGN TEAM FOR A WORLD RENOWNED COMPUTER COMPONENTS MANUFACTURER. Candidates will be responsible for various RTL design tasks related to SoC Design and integration.

QUALIFICATIONS

- Bachelor or Masters of Science degree in Electrical Engineering
- 5 years or more of experience as a RTL Design Engineer in the Front End RTL
- 4+ years of experience as a unit RTL design owner for complex IPs on large ICs/SoCs
- 4 years or more experience in SystemVerilog or Verilog coding
- System Verilog RTL coding and VCS RTL Simulator experience
- Knowledge of SoC design including design for testability, Lint, Synopsys Synthesis
- 4 years or more experience in synthesis and timing closure
- 2 years or more experience with SoC level low-power design methodologies, and clocking/reset

Additional Skills Desired (Nice to Have)

- Knowledge of DFT or DFx techniques
- Knowledge of OVL/SVA assertions
- Experience in high-speed serial protocols, such as Serial ATA, USB, PCI-Express, etc.
- Knowledge of coverage-driven functional verification, test plan development and test plan execution
- Knowledge of O-in Clock Domain Crossing tool Knowledge of TAP Controller, MBIST and Scan for high volume manufacturing

Estimated length of assignment: About 6 months
Number of positions available: 2
Estimated hours per week: 40 hours
% of travel required: 10%
Telecommuting: Yes

Please include a daytime phone number where you can best be reached along with your Resume. Please also include a brief cover letter outlining your experience as related to this job requirement. CompuCom is an Equal Opportunity Employer. Candidates must have the unrestricted right to work in the US. No 3rd party/recruiters please.