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Projektbeschreibung
RTL Digital Designer (m/f)
Harvey Nash GmbH supports many of Germanys leading organisations to source, recruit and manage the highly skilled IT and engineering talent they need to succeed in an increasingly technology-driven world.
We offer some of the most interesting and challenging roles where you get to work with the latest IT Technologies with some of the biggest clients in Germany.
For our client, a global R&D Chip Provider we are looking for an RTL Digital Designer (m/f) on a freelance basis for Munich (f/m)
Project Start: 01.01.2018
Project duration: 6 Months
Location: Munich (remote available up to 40%)
Languages: English
Main Tasks:
* Architecture definition, RTL Design and System Verilog verification of a SCPHY interface.
* System-Verilog modelling of Analog Front End circuitry
Project 1
* RTL update based on change request list
* Behavioral model update of analog FE based on change lists
* Documentation of changes
* Verification of changes
Project 2
* Architecture definition and RTL design of G3.5 SCPHY based on RMMI
* Documentation of design
* Behavioral modelling of analog FE based on architectural specs
* Verification of design
Skills:
* Digital IC expertise
* Minimum 6 years experience with RTL design (VHDL etc.)
* Experience in System-Verilog modelling
* RMMI and MPHY design experience or high speed serial interface
* Troubleshooting and signal integrity skills
* Strong customer orientation
* ASIC, SoC and FPGA design and Verification background
Languages:
Written and spoken English know-how is demanded, all documentation will be in English
If you are interested in this vacancy (336812), we would be pleased to receive your updated CV, availability and your salary expectations.
Please feel free to contact me if you have any questions.
Harvey Nash GmbH supports many of Germanys leading organisations to source, recruit and manage the highly skilled IT and engineering talent they need to succeed in an increasingly technology-driven world.
We offer some of the most interesting and challenging roles where you get to work with the latest IT Technologies with some of the biggest clients in Germany.
For our client, a global R&D Chip Provider we are looking for an RTL Digital Designer (m/f) on a freelance basis for Munich (f/m)
Project Start: 01.01.2018
Project duration: 6 Months
Location: Munich (remote available up to 40%)
Languages: English
Main Tasks:
* Architecture definition, RTL Design and System Verilog verification of a SCPHY interface.
* System-Verilog modelling of Analog Front End circuitry
Project 1
* RTL update based on change request list
* Behavioral model update of analog FE based on change lists
* Documentation of changes
* Verification of changes
Project 2
* Architecture definition and RTL design of G3.5 SCPHY based on RMMI
* Documentation of design
* Behavioral modelling of analog FE based on architectural specs
* Verification of design
Skills:
* Digital IC expertise
* Minimum 6 years experience with RTL design (VHDL etc.)
* Experience in System-Verilog modelling
* RMMI and MPHY design experience or high speed serial interface
* Troubleshooting and signal integrity skills
* Strong customer orientation
* ASIC, SoC and FPGA design and Verification background
Languages:
Written and spoken English know-how is demanded, all documentation will be in English
If you are interested in this vacancy (336812), we would be pleased to receive your updated CV, availability and your salary expectations.
Please feel free to contact me if you have any questions.
Projektdetails
-
Einsatzort:
München, Deutschland
-
Projektbeginn:
asap
-
Projektdauer:
Keine Angabe
- Vertragsart:
-
Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
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Kategorie:
Medien/Design, Ingenieurwesen/Technik