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RTL Design Engineer
Eingestellt von Damco Solutions
Gesuchte Skills: Design, Engineer
Projektbeschreibung
JOB TITLE: RTL Design Engineer
JOB LOCATION: County Clare, Ireland
JOB TYPE: Contract
JOB DESCRIPTION:
RESPONSIBILITIES:
Developing the micro-architectural specification of complex design block(s).
Logic implementation of complex design block(s) using RTL coding techniques.
Working with pre-Silicon validation engineers to develop unit and cluster level directed/random tests and environments.
Targeting (synthesis, place and route and timing closure) RTL design blocks to FPGA architectures.
Using lab equipment to debug hardware functionality in the lab.
Interacting closely with other teams such as the Architecture, Software and Post-Silicon Validation.
EXPERIENCE:
Hands on FPGA, ASIC and/or SoC design experience.
RTL level Digital IC design using System Verilog and/or Verilog.
Proven track record of successful first time delivery of projects.
A self-starter with the ability to assume leadership roles.
Ability to work well in a diverse team environment.
Experience with industry standard development tools and methodologies.
SKILLS:
Experience with languages/tools such as System Verilog for Verification, OVM/UVM and Perl, Shell Scripting, Altera/Xilinx FPGA Tool Suites.
Experience in some of the following technologies/protocols: CPRI, Ethernet, PCIe, LTE/3G
JOB LOCATION: County Clare, Ireland
JOB TYPE: Contract
JOB DESCRIPTION:
RESPONSIBILITIES:
Developing the micro-architectural specification of complex design block(s).
Logic implementation of complex design block(s) using RTL coding techniques.
Working with pre-Silicon validation engineers to develop unit and cluster level directed/random tests and environments.
Targeting (synthesis, place and route and timing closure) RTL design blocks to FPGA architectures.
Using lab equipment to debug hardware functionality in the lab.
Interacting closely with other teams such as the Architecture, Software and Post-Silicon Validation.
EXPERIENCE:
Hands on FPGA, ASIC and/or SoC design experience.
RTL level Digital IC design using System Verilog and/or Verilog.
Proven track record of successful first time delivery of projects.
A self-starter with the ability to assume leadership roles.
Ability to work well in a diverse team environment.
Experience with industry standard development tools and methodologies.
SKILLS:
Experience with languages/tools such as System Verilog for Verification, OVM/UVM and Perl, Shell Scripting, Altera/Xilinx FPGA Tool Suites.
Experience in some of the following technologies/protocols: CPRI, Ethernet, PCIe, LTE/3G
Projektdetails
Geforderte Qualifikationen
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Kategorie:
Medien/Design, Ingenieurwesen/Technik