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Memory Subsystem Design Engineer
Eingestellt von CompuCom
Gesuchte Skills: Design, Engineer
Projektbeschreibung
In this position you will develop and refine models of system behavior and project the performance of the future system. This effort will drive architecture tradeoff studies, memory controller design and memory device requirements, focusing on controller and device behavior for a novel memory technology.
This position requires working with controller design teams, hardware and software architects to develop system models, evaluate memory system performance, and influence hardware or software design.
This is a senior position requiring the ability to develop models and evaluation tools in C/C++, SystemC and Verilog as well as proven track record in memory subsystem architecture, cache design and system modelling. Automation and reporting requires familiarity with Perl, Python and Excel.
YEARS OF EXPERIENCE REQUIRED: 5+.
REQUIRED SKILLS:
- C/C++
- System C
- Verilog
- DDRx DRAM, memory controller design
- Cache architecture
- CPU performance simulation and analysis and software development
- BS/MS in EE, CS, CE or equivalent
This contract position is expected to be 18 months in duration.
Projektdetails
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Einsatzort:
Hillsboro, Vereinigte Staaten
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Projektbeginn:
asap
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Projektdauer:
Keine Angabe
- Vertragsart:
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Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
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Kategorie:
Medien/Design, Ingenieurwesen/Technik