Vakante Jobangebote finden Sie unter Projekte.
Projektbeschreibung
* Building advanced IP/Ethernet communication stacks direct from chip to SFP
* Working closely with other FPGA developers to agree on system and interface specifications
* Working closely with software developers to develop an optimal interface between FPGA hardware and user space software
VORAUSSETZUNGEN:
* Experience with FPGA development using VHDL
* Thorough knowledge of Xilinx Ultrascale products and development tools, including Vivado and ModelSim for simulation and verification
* Development of generic, robust and re-usable processing cores from system and architectural requirements
* Proficiency in all phases of FPGA development, ie design, code, simulation, synthesis, timing closure, validation, product test
* Document designs and interface specifications
* Very good experience in electrical engineering, or equivalent professional experience
Projektdetails
-
Einsatzort:
Rastatt, Deutschland
-
Projektbeginn:
asap
-
Projektdauer:
12 Woche(n)
- Vertragsart:
-
Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
-
Kategorie:
Medien/Design, Ingenieurwesen/Technik