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FPGA Design Engineer
Eingestellt von CPL Solutions
Gesuchte Skills: Engineer, Design
Projektbeschreibung
FPGA engineer required for 6 month contract in Dublin 15.
Duties include:
ASIC clocking gating and Memory replacement and FPGA synthesis checks
FPGA implementation, resolving timing, congestion and routing issues
Updating emulation RTL simulation environment
IP bring up on FPGA board for CAN/I2S
Xilinx DDR3 controller bring up on Virtex7
Design partitioning between multiple FPGAs
Rework for PCBs
Writing RTL replacement for non-synthesizable ASIC blocks that need to be modelled in FPGA
Debug using Chipscope, external logic analyser and ITP debugger
Unit and SoC level RTL simulation with ASIC primitives replaced with FPGA primitives
Experience
5-10 years experience working as FPGA engineer
Duties include:
ASIC clocking gating and Memory replacement and FPGA synthesis checks
FPGA implementation, resolving timing, congestion and routing issues
Updating emulation RTL simulation environment
IP bring up on FPGA board for CAN/I2S
Xilinx DDR3 controller bring up on Virtex7
Design partitioning between multiple FPGAs
Rework for PCBs
Writing RTL replacement for non-synthesizable ASIC blocks that need to be modelled in FPGA
Debug using Chipscope, external logic analyser and ITP debugger
Unit and SoC level RTL simulation with ASIC primitives replaced with FPGA primitives
Experience
5-10 years experience working as FPGA engineer
Projektdetails
Geforderte Qualifikationen
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Kategorie:
Medien/Design, Ingenieurwesen/Technik