Engineer High Voltage Design

For our client in Austria we are currently looking for:

Engineer High Voltage Design (m/f)

Education/Experience:

- University or FH degree in Electronics or related
- Understanding of key analog building blocks
- Understanding of Lab and Test constraints on analog design
- Understanding of design and layout, preferably already in HV-CMOS processes (50V)
- Experience on power management blocks as eg dcdc, regulators, is a plus
- Experience with Cadence design tools
- Minimum 2 years experience in analog design

JOB DESCRIPTION/TASKS AND RESPONSIBILITIES:

- Design, simulation and verification of analog HV blocks
- Generation of Verilog-A models for self designed blocks
- Model simulation of Sub-Blocks
- Performing design reviews
- Supervision of layout generation
- Guidance of Lab measurements

Start: ASAP
Location: Graz
Duration: Project or Permanent position

Looking forward to hearing from you soon!Michael Bailey International is acting as an Employment Business in relation to this vacancy.