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Vakante Jobangebote finden Sie unter Projekte.
Vakante Jobangebote finden Sie unter Projekte.
Projektbeschreibung
- Full-custom analog and mixed-signal layout implementation
- Physical verification and parasitic extraction
- IC layout floor planning and interfacing of full-custom
- Top-level physical sign-off verification (DRC/LVS/ANT/ERC/LVL)
- Continuous improvement of design environment regarding full-custom layout tools
- Layout task planning
- Top-level sign-off verification
- Experience in Cadence Design environment
- Experience in Basically used technologies: standard CMOS 130nm, 65nm, 40nm, 28nm
- Experience in concept development, topology analysis and modeling of analog circuits
- Know-how of deep-submicron device parameters and layout dependent effects
Weitere Qualifikationen: Hardware developer
- Physical verification and parasitic extraction
- IC layout floor planning and interfacing of full-custom
- Top-level physical sign-off verification (DRC/LVS/ANT/ERC/LVL)
- Continuous improvement of design environment regarding full-custom layout tools
- Layout task planning
- Top-level sign-off verification
- Experience in Cadence Design environment
- Experience in Basically used technologies: standard CMOS 130nm, 65nm, 40nm, 28nm
- Experience in concept development, topology analysis and modeling of analog circuits
- Know-how of deep-submicron device parameters and layout dependent effects
Weitere Qualifikationen: Hardware developer
Projektdetails
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Einsatzort:
Styria (Austria), Österreich
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Projektbeginn:
asap
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Projektdauer:
4 MM
- Vertragsart:
-
Berufserfahrung:
Keine Angabe
Geforderte Qualifikationen
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Kategorie:
Medien/Design