Analog IC Layout Engineer

ANALOG IC LAYOUT ENGINEER CADENCE AND MENTOR TOOL SUITES INDUSTRY DEGREE QUALIFIED VIRTUOSO, VIRTUOSO XL

eCRM Euro are looking for a Analog IC Layout Engineer based in Europe to work on cell layout for analog RF blocks using Cadence and Mentor tool suites on 40 nm CMOS technology 40 nm knowledge not a requirement. You will also be required to work on verification DRC LVS checks using mentor calibre.

The successful candidate will work closely with the designers and layout lead on new product developments. Will create the layout based on the schematic coming from the designer and make sure it is LVS DRC compliant. Will take into account the constraints from the designer and will go through iterations with the designer to further optimize the layout from a performance and area perspective.
Industry Degree qualified the successful candidate will have established experience in Analog and Digital IC Layout techniques, experience in Cadence suite of Layout tools Virtuoso, Virtuoso XL

Please CV for full job spec and immediate interview

At eCRM Euro Ltd we specialise in proving a fast accurate service in pairing specific skills to our client requirements. As a trusted partner to large consultancy firms and end clients spanning various industry sectors from all over Europe, we have a reputable name and can be associated with offering a first class service to both clients and candidates we work with. In offering a recognised recruitment service we can also give a complete solution to candidates by offering an extremely competitive pay rolling service, specialising in Taxation.